1. Field of the Invention
The present invention relates to a thermal resistance calculation method and device for calculating the thermal resistance of a semiconductor package in which a semiconductor chip is incorporated within a case.
2. Description of the Related Art
Among the problems such as failures in operation that typically occur in electronic components, problems originating from heat generally occur due to increase in localized temperatures in electronic components. With the increasing density of electronic components that has accompanied the decreasing size of electronic equipment in recent years, temperature can increase significantly within a short range. In other words, these problems are caused by increase in calorific density. Conventionally, rough estimates of temperature are made for each electrical component in the design stage and components are then fabricated with due consideration given to temperature variation. With the increase in heat density, however, the actual heat conditions may exceed the temperatures estimated in the design stage, and problems including malfunctioning and failure may therefore occur.
For electrical parts mounted in electrical equipment, therefore, temperature estimates must be made stringently for each individual electrical component, and the design of cooling devices (including the choice and placement of heat radiation fins, fans, etc.) must be based on these temperature estimates. Thermal resistance must be accurately determined to predict temperatures in semiconductor packages, which are electrical parts that generate heat. One method of the prior art for precisely determining thermal resistance in a semiconductor package is disclosed in xe2x80x9cValidation Study of Compact Thermal Resistance Models of IC Packagesxe2x80x9d by Zemo Yang and Young Kwon in IEEE 1996 Electronic Components and Technology Conference, pages 165-171. According to this method, the surface temperatures of parts, substrates, and heat radiation equipment are first found by using a thermocouple, the junction temperature of a semiconductor package is estimated by using the voltage drop across the base and emitter of a transistor, and these temperatures are inserted in the various compact thermal resistance models shown in FIGS. 1A-1C. The thermal resistance of a semiconductor package itself has conventionally been found by methods using such compact thermal resistance models, and the thermal resistance thus determined are reflected in the design of cooling equipment.
Since heat generation in electrical components such as semiconductor packages causes problems in electronic components as described in the foregoing description, radiation fins are often mounted on the surface of case of semiconductor package to release the heat of the semiconductor package. However, radiation fins are not included in the above-described compact thermal resistance models shown in FIGS. 1A-1C. In other words, the thermal resistance of a semiconductor package with radiation fins mounted cannot be determined by the prior-art method of finding thermal resistance by using these compact thermal resistance models. The prior art includes cases in which the thermal resistance of a semiconductor package without radiation fins and the thermal resistance of radiation fins were each found separately, but thermal resistance in a case in which the two are unified has not been considered, and a calculation method has not been established. Mounting radiation fins on the case should change the thermal resistance of the path passing through the surface of case on which radiation fins are mounted, but this altered thermal resistance has not been found in the prior art. Although cooling devices may be designed based on the thermal resistance of a semiconductor package unit lacking radiation fins and the thermal resistance of the radiation fins unit, such an approach may not realize the optimum design.
In the above-described method of the prior art, moreover, the thermal resistance of a semiconductor package is found based on the measurements of various temperatures for one type of semiconductor package, and a change in any one of the factors that influence thermal resistance, such as the size of the semiconductor package, the size of the semiconductor chip, and the resin material that fills the inside of the semiconductor package, necessitates the repetition of the measurement of temperatures and associated calculations. The measurement results and calculation results for the thermal resistance computation relating to one type of semiconductor package therefore cannot be applied to another type of semiconductor package. Each and every measurement and calculation of the temperatures of the various points of the semiconductor package must be carried out whenever calculating for electronic components that are not exactly the same. The preparatory work necessary for designing electronic equipment is therefore extremely complicated, and this complexity both increases manufacturing costs and lengthens the time necessary to design and manufacture electronic equipment. The problem therefore exists that conventional methods cannot keep pace with the short life cycles of the recent products.
Although not described in detail, there is a method of finding the thermal resistance of a semiconductor package by a three-dimension heat-fluid simulation in which a three-dimensional problem of heat and fluid is solved by making use of a difference method or finite-element method based on the laws of conservation of mass (continuity equation), conservation of momentum (Navier-Stokes equation), and conservation of energy (conservation of energy equation). This method can be applied to determination the thermal resistance of a semiconductor package with radiation fins. In this method, however, as with the above-described prior art, the three-dimensional heat-fluid simulation must be repeated from the beginning if there is any change in any one of the factors that affect thermal resistance, such as the size of the semiconductor package or semiconductor chip or the material of the resin. If absolutely identical semiconductor packages are not used, therefore, the design of each electronic component necessitates extremely laborious procedures such as measurements of temperatures and calculations, meaning that a great deal of time is required for the design and manufacture of electronic component, and the resulting products are not sufficiently adaptable for the ever-shortening life cycle of product. In particular, methods in which such a three-dimensional heat-fluid simulation is carried out require special expertise in order to apply a difference method or finite-element method to partition meshes or set boundary conditions. These methods are therefore not easily used by anyone lacking expert knowledge, and in addition, are difficult because each and every electronic component must be individually designed.
It is an object of the present invention to provide a thermal resistance calculation method that would allow even a person lacking specialized knowledge to quickly and easily calculate the thermal resistance of a semiconductor package on which radiation fins are mounted, regardless of changes in such conditions as the shape of the semiconductor package.
According to the present invention, the thermal resistance of a semiconductor package on which radiation fins are mounted can be quickly and easily found because thermal resistance of a semiconductor package in which a semiconductor chip is accommodated inside a case is found based on the following thermal resistance. One of them is the thermal resistance of the path of heat radiation through the bottom surface of the case, another of them is the thermal resistance of the path of heat radiation through a leadframe, another of them is the thermal resistance of the path of heat radiation through sides of the case other than the leadframe, another of them is the thermal resistance between the semiconductor chip and case surface, and another of them is the thermal resistance of the radiation fins.
The thermal resistance calculating device of this invention includes an input means, a processing means, and a display means; and the processing means is for finding the thermal resistance of a semiconductor package on which radiation fins are mounted based on the above-described calculation method. To find this thermal resistance by the processing means, at least the size of the semiconductor package, the size of the semiconductor chip, and thermal resistance of the radiation fins are inputted from the input means. The display means displays thermal resistance of the semiconductor package found by the processing means. This thermal resistance calculation method displays the thermal resistance of a semiconductor package under a number of conditions when these conditions are input and therefore enables the prediction of the thermal resistance of a product that has not actually been fabricated, thus enabling optimization of the product design.
The above and other objects, features, and advantages of the present invention will become apparent from the following description with references to the accompanying drawings which illustrate examples of the present invention.